MoRV Booth at DATE 2016
ERMAVSS Workshop on DATE 2016
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MoRV at the Patmos Conference 2016

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Welcome to the MoRV („Modeling of Reliability under Variability“) project homepage.

Nowadays our modern life style completely depends on a multitude of integrated circuits (ICs) which are environing us. Their application field ranges from our common smart phones, over more and more sophisticated intelligent cars, to even medical implants. Year by year these ICs shrink in size due to a steady miniaturization process, but still become more and more efficient. Increasingly, partly vitally important tasks are assigned to these circuits.

What is the problem?

As the miniaturizing process started decades ago, technology is on the verge of reaching the boundaries of atomic scales.
chip corner Therefore quantum mechanical effects have to be considered, as they cause a multitude of new problems, which can be summed up by the term aging effects (see grey box below). In the past, system reliability only depended on manufacturing process variations and the possibility of sudden failure after long term usage. Recent systems in addition, tend to impair their characteristics over periods of years leading to a rapid system breakdown.

What is the situation?

Techniques, commonly applied to increase system reliability, like triple installation and steady comparison of components (triple modular redundancy) are inapplicable for this kind of problem. As every component suffers the same aging effects they all tend to fail approximately at the same time.
Currently the industries only responds to that particular problem is to apply extreme safety margins. Partly systems are driven half their capable speed, just to eliminate the possibility of failure, even for the worst produced, worst aged system operating under worst possible conditions. That fact concludes that a significant fraction of the system capacity is sacrificed in recent systems neglecting a large amount of advantages gained by miniaturization.

What are we doing about it?

This is where MoRV attaches. In MoRV the leading, aging effect focused research groups of industry (Infineon, IMEC, Global TCAD Solutions) and academia (TU Wien, Fraunhofer EAS, IROC, OFFIS) cooperate to create a quantum mechanical description and based on that to design simplified but accurate aging models of transistors, logic gates and even entire system components (e.g. an 8 bit multiplier). If a systems future performance, e.g. after years of usage, is already known during its design process, circiut board and chips with design the system can be designed to adapt to its aged state and that decreases the required safety margins significantly.

transistor schematic

On the left you see the latest type transistor (MuGFET), commonly used in technology generations scaled below 32 nm. A current between the outer metal contacts (Source and Drain) only flows through the channel (red) if an electrical current is applied to the middle contact (Gate). The name MuGFET (Multi Gate Field Effect Transistor) derives from a novel feature. A MuGFET transistors Gate not only controls the channels behavior from the top, but also from the sides. This leads to faster switching behavior and simultaneously to reduced power consumption.
On the other hand, a multitude of aging effects occur with increasing miniaturization. The two most important are shown in the figure. Electro migration (EM) occurs in the case of high current densities (which commonly prevail in very thin conductors). In such conductors metal atoms can’t withstand the enormous pressure induced by the flow of electrons which leads, over the years of operation, to excavation of the conductors material. As the conductor becomes continuously thinner during this process, the amperage rises, which amplifies the effect during the aging process, until conductibility is lost entirely. Negative Bias Temperature Instability (NBTI) causes single electrons to be trapped within the isolation layer (green) between Gate and Channel. Switching on now requires additionally overcoming the charge of all trapped electrons, leading to reduced switching speeds of transistors and though decelerates the entire system. Although NBTI is partly reversible, and fractionally its effects heal out during long-lasting phases of system inactivity, numerous charges feature above reasonable healing times, ranging from hours to centuries.

Keywords


Reliability, Process variation, Variability, Design for Reliability, Multi-physics simulation, Solid state physics, Compact model, Circuit model, Macro model