marketplace

Welcome to the MoRV projects marketplace.

Below you find data and a list of public deliverables which are free to download for academical and industrial research. Further you find a list of publications covering the results of the MoRV projects research. Links to the publishers are provided if a publication is licenced open access.

representative trap data for PTM

This section provides representative trap data for Predictive Technology Models. They can be used to test scripts and aging models. Links to the corresponding PTMs are provided below each download.


Representative trap data for PTM: 16nm PTM HP.


Representative trap data for PTM: 22nm PTM HP.


Representative trap data for PTM: 32nm PTM HP.


Representative trap data for PTM: 45nm PTM HP.


Representative trap data for PTM: 65nm PTM.


Representative trap data for PTM: 130nm PTM.

deliverables

This section provides public deliverables of the MoRV project.

list of publications

This section provides a list of publications covering the results of the MoRV projects research on semiconductor reliability. Those publications which are liscenced as open access are provided as link to publishers download page.


  • K. Giering, G. Rott, G. Rzepa, A. Puppala, T. Reich, W. Gustin, T. Grasser und R. Jancke, „Physics-based Compact Modeling of NBTI for Analog and Digital Circuit Design,“ submitted to IEDM, 2015.

  • K.-U. Giering, C. Sohrmann, G. Rzepa, L. Heiß, T. Grasser und R. Jancke, „NBTI modeling in analog circuits and its application to long-term aging simulations,“ IIRW, 2014.

  • G. Rzepa, W. Goes, G. A. Rott, K. Rott, M. Karner, C. Kernstock, B. Kaczer, H. Reisinger und T. Grasser, „Physical Modelling of NBTI: From Individual Defects to Devices,“ in SISPAD, 2014.

  • G. Rzepa, W. Goes, B. Kaczer und T. Grasser, „Characterization and Modeling of Reliability Issues in Nanoscale Devices,“ ISCAS (invited), 2015.

  • T. Grasser, „Stochastic Charge Trapping in Oxides: From Random Telegraph Noise to Bias Temperature Instabilities,“ Microelectronics Reliability, Nr. 52, p. 39–70, 2012.

  • G. Rzepa, W. Goes, B. Kaczer und T. Grasser, „Microscopic Oxide Defects Causing BTI, RTN, and SILC on High-K FinFETs,“ SISPAD, 2015.

  • G. A. Rott, K. Rott, H. Reisinger, W. Gustin und T. Grasser, „Mixture of negative bias temperature instability and hot-carrier driven threshold voltage degradation of 130 nm technology p-channel transistors,“ in ESREF, 2014.

  • T. Grasser, G. Rzepa, M. Waltl, W. Gös, K. Rott, G. A. Rott, H. Reisinger, J. Franco und B. Kaczer, „Characterization and Modeling of Charge Trapping: From Single Defects to Devices,“ in ICICDT, 2014.

  • B. Kaczer, „The Defect-Centric Perspective of Device and Circuit Reliability — From Individual Defects to Circuits,“ invited to ESSDERC, Sep 2015.

  • R. Eilers, M. Metzdorf, D. Helms und W. Nebel, „Efficient NBTI modeling technique considering recovery effects,“ International Symposium on Low Power Electronics and Design (ISLPED), 2014. -open access-

  • D. Helms, R. Eilers, M. Metzdorf und W. Nebel, „Abstracting TCAD models above the circuit level,“ in DATE, 2015.

  • D. Alexandrescu, N. Bidokhti, A. Yu, A. Evans und E. Costenaro, „Managing SER Costs of Complex Systems through Linear Programming,“ in IOLTS, 2014.

  • A. Haggag, A. Evans und D. Alexandrescu, „Comparing Hard and Soft Error Rate Models for Scaled SoCs,“ in SELSE, 2015.

  • D. D. Alexandrescu, A. Evans, E. Costenaro und M. Glorieux, „A Call for Cross-Layer and Cross-Domain Reliability Analysis and Management,“ International On-Line Test Symposium, 2015.

  • B. Kaczer: Hierarchical Modeling Of Reliability And Time Dependent Variability In The Morv Project Workshop presentation at ESSCIRC/ESSDERC2015

  • B. Kaczer: Modeling Reliability Under Variability In Nano-Scale Devices Workshop presentation at ESSCIRC/ESSDERC2015

  • E. Costenaro, Helms, D., Bidokhti, N., Evans, A., Glorieux, M., Alexandrescu, A. Facilitating Cross-Layer Reliabilty Management through Universal Reliability Information Exchange. Design Automation Conference (DAC) workshop : System-to-Silicon Performance Modeling and Analysis, 2015.

  • H. Kukner et al, Degradation Analysis of Datapath Logic Subblocks under NBTI aging in FinFET technology , ISQED 2014

  • I. Agbo; Taouil, M.; Hamdioui, S.; Weckx, P.; Cosemans, S.; Raghavan, P.; Catthoor, F. and Dehaene, W.: Comparative BTI impact for SRAM cell and sense amplifier designs, MEDIAN Finale – Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale, 2015

  • M. Simicic, V. Putcha, B. Parvais, P. Weckx, B. Kaczer, G. Groeseneken, G. Gielen, D. Linten, A. Thean: Advanced MOSFET Variability and Reliability Characterization Array, IIRW 2015

  • P. Weckx, B. Kaczer, J. Franco, Ph. J. Roussel, E. Bury, A. Subirats, G. Groeseneken, F.Catthoor, D. Linten, P. Raghavan, A. Thean: Defect-centric perspective of combined BTI and RTN time-dependent variability, IIRW 2015

  • P. Weckx, B. Kaczer, P. Raghavan, J. Franco, M. Simicic, Ph. J. Roussel, D. Linten, A. Thean, D. Verkest, F. Catthoor, G. Groeseneken: Characterization and simulation methodology for time-dependent variability in advanced technologies, CICC2015

  • P. Weckx, B. Kaczer, Ph. J. Roussel, F. Catthoor, G. Groeseneken: Impact of time-dependent variability on the yield and performance of 6T SRAM cells in an advanced HK/MG technology, ICICDT 2015

  • P. Weckx et al, Non Monte Carlo Methodology for High Sigma Simulations of Circuits under Workload dependent BTI Degradation – Application to 6T SRAM, IRPS 2014

  • V. Putcha, Marko Simicic, Pieter Weckx, Bertrand Parvais, Jacopo Franco, Ben Kaczer, Dimitri Linten, Diederik Verkest, Aaron Thean, Guido Groeseneken: Smart-array for pipelined BTI characterization, IIRW 2015

  • M.Metzdorf et al.: Abstracting TCAD aging models above the circuit level. DATE 2015 Friday workshop.